×

Message

EU e-Privacy Directive

This website uses cookies to manage authentication, navigation, and other functions. By using our website, you agree that we can place these types of cookies on your device.

You have declined cookies. This decision can be reversed.

In addition to the manual soldering practice when setting up the device, there is a lot to discover when dealing with programming the microcontroller. The development environment (IDE = Integrated Development Environment) PSoC Creator from Cypress / Infineon takes some getting used to, but offers various input methods that are used with ACSI2SD:

The software for the ARM processor is written in C and appropriately divided into modules, which are well commented so that you can find your way around quickly.
The SCSI controller core is described as a state machine in Verilog and implemented in the freely wirable UDB area of ​​the controller.
The ACSI-SCSI interface, on the other hand, is described as a direct circuit diagram (consisting of flip-flops / registers, sequential logic, LUT) and also implemented in the freely wirable UDB area of ​​the controller.

The last two methods in particular can serve as an introduction to FPGA programming (in the sense of hardware description). In addition, the split into a separate ACSI-to-SCSI interface mimics the idesign of the (later) Atari hard drives, because this interface was built with discrete TTL logic in order to then drive a SCSI hard disk.

Both the flash memory of the processor and the random interconnect UDB area outside the ARM core are only about half used, so there is plenty of space for your own extensions. Particularly interesting for those who have the Programmer / Debugger KitProg.

Proposal for a first PSoC modification for users who are familiar with PSoC Creator:

Since the ACSI-SCSI interface works on-chip in the PSoC, the reserve for the deskew value can be reduced. In the Verilog source file scsiTarget.v line 298, reduce the deskew value from 1 to 0, recompile the project (build), program (the size of the .hex programming file should not change) and test it. The modification gains around 3% in speed (measured with the HDDAST4.TOS program) and brings the transfer rate closer to the theoretical maximum of 2MB/s.

Simply by increasing the clock frequency, the transfer rate can be increased by around 10-20% (rather more with Proc, rather less with Mod).